Synopsys, Freescale work on IP block verification for SoC designs

01/21/2013 | Electronics Weekly (U.K.)

Synopsys is collaborating with Freescale Semiconductor on verification of intellectual-property blocks that go into system-on-a-chip designs. "With the increasing use of standards-based IPs, verification challenges shift to finding the fastest and most effective way to validate the integration of complex protocols with our differentiated SoC content, while boosting debug and simulation performance," Freescale's Ken Hansen said.

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Electronics Weekly (U.K.)

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